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| SN5407, SN5417, SN7407, SN7417 HEX BUFFERS/DRIVERS WITH OPEN COLLECTOR HIGH VOLTAGE OUTPUTS SDLS032F - DECEMBER 1983 - REVISED JANUARY 2004 D Convert TTL Voltage Levels to MOS Levels D High Sink-Current Capability D Input Clamping Diodes Simplify System D D Design Open-Collector Driver for Indicator Lamps and Relays Inputs Fully Compatible With Most TTL Circuits SN5407, SN5417 . . . J OR W PACKAGE SN7407, SN7417 . . . D, N, OR NS PACKAGE (TOP VIEW) description/ordering information These TTL hex buffers/drivers feature high-voltage open-collector outputs for interfacing with high-level circuits (such as MOS) or for driving high-current loads (such as lamps or relays), and also are characterized for use as buffers for driving TTL inputs. The SN5407 and SN7407 have minimum breakdown voltages of 30 V, and the SN5417 and SN7417 have minimum breakdown voltages of 15 V. The maximum sink current is 30 mA for the SN5407 and SN5417 and 40 mA for the SN7407 and SN7417. These devices perform the Boolean function Y = A in positive logic. These circuits are completely compatible with most TTL families. Inputs are diode clamped to minimize transmission-line effects, which simplifies design. Typical power dissipation is 145 mW, and average propagation delay time is 14 ns. 1A 1Y 2A 2Y 3A 3Y GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC 6A 6Y 5A 5Y 4A 4Y SN5407 . . . FK PACKAGE (TOP VIEW) V CC 4Y NC 1 1Y 1A 3 2 20 19 18 6Y 17 NC 16 5A 15 NC 14 5Y 2A NC 2Y NC 3A 4 5 6 7 8 9 10 11 12 13 3Y GND NC - No internal connection Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. On products compliant to MIL PRF 38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. Copyright 2004, Texas Instruments Incorporated POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 NC 4A 6A 1 SDLS032F - DECEMBER 1983 - REVISED JANUARY 2004 SN5407, SN5417, SN7407, SN7417 HEX BUFFERS/DRIVERS WITH OPEN COLLECTOR HIGH VOLTAGE OUTPUTS ORDERING INFORMATION TA PACKAGE Tube Tape and reel SOIC - D 0C to 70C PDIP - N SOP - NS CDIP - J -55C to 125C CFP - W LCCC - FK Tube Tape and reel Tube Tube Tube Tube Tape and reel ORDERABLE PART NUMBER SN7407D SN7407DR SN7417D SN7417DR SN7407N SN7417N SN7407NSR SN7417NSR SNJ5407J SNJ5417J SNJ5407W SNJ5407FK 7417 SN7407N SN7417N SN7407 SN7417 SNJ5407J SNJ5417J SNJ5407W SNJ5407FK 7407 TOP-SIDE MARKING Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. logic diagram, each buffer/driver (positive logic) A Y schematic VCC 6 k 3.4 k 1.6 k Input A Output Y 100 1 k GND Resistor values shown are nominal. 2 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SN5407, SN5417, SN7407, SN7417 HEX BUFFERS/DRIVERS WITH OPEN COLLECTOR HIGH VOLTAGE OUTPUTS SDLS032F - DECEMBER 1983 - REVISED JANUARY 2004 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 5.5 V Output voltage, VO (see Notes 1 and 2): SN5407, SN7407 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 V SN5417, SN7417 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 V Package thermal impedance, JA (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values are with respect to GND. 2. This is the maximum voltage that should be applied to any output when it is in the off state. 3. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 4) MIN SN5407, SN5417 VCC VIH VIL VOH IOL TA Supply voltage High-level input voltage Low-level input voltage SN5407, SN7407 High-level output voltage Low-level output current Operating free-air temperature SN5417, SN7417 SN5407, SN5417 SN7407, SN7417 SN5407, SN5417 SN7407, SN7417 -55 0 SN7407, SN7417 4.5 4.75 2 0.8 30 15 30 40 125 70 mA C V NOM 5 5 MAX 5.5 5.25 V V V UNIT NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK IOH VCC = MIN, VCC = MIN, TEST CONDITIONS II = -12 mA VIH = 2 V VOH = 30 V (SN5407, SN7407) VOH = 15 V (SN5417, SN7417) IOL = 16 mA IOL = 30 mA (SN5407, SN5417) IOL = 40 mA (SN7407, SN7417) MIN TYP MAX -1.5 0.25 0.25 0.4 0.7 0.7 1 40 -1.6 29 41 30 mA A mA mA mA V mA UNIT V VOL II IIH IIL ICCH VCC = MIN, VCC = MAX, VCC = MAX, VCC = MAX, VCC = MAX VIL = 0.8 V VI = 5.5 V VIH = 2.4 V VIL = 0.4 V ICCL VCC = MAX 21 For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. All typical values are at VCC = 5 V, TA = 25C. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 3 SDLS032F - DECEMBER 1983 - REVISED JANUARY 2004 SN5407, SN5417, SN7407, SN7417 HEX BUFFERS/DRIVERS WITH OPEN COLLECTOR HIGH VOLTAGE OUTPUTS switching characteristics, VCC = 5 V, TA = 25C (see Figure 1) PARAMETER tPLH tPHL tPLH tPHL FROM (INPUT) A A TO (OUTPUT) Y Y TEST CONDITIONS RL = 110 , RL = 150 , CL = 15 pF CL = 50 pF MIN TYP 6 20 MAX 10 30 15 26 ns ns UNIT PARAMETER MEASUREMENT INFORMATION VCC RL From Output Under Test Test Point CL (see Note A) LOAD CIRCUIT 3V Input tPLH High-Level Pulse 1.5 V tw Low-Level Pulse 1.5 V VOLTAGE WAVEFORMS PULSE WIDTHS NOTES: A. B. C. D. 1.5 V Out-of-Phase Output 1.5 V In-Phase Output tPHL 1.5 V VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES 1.5 V 1.5 V 1.5 V 0V tPHL VOH 1.5 V VOL tPLH VOH 1.5 V VOL CL includes probe and jig capacitance. In the examples above, the phase relationships between inputs and outputs have been chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO = 50 , tr 7 ns, tf 7 ns. The outputs are measured one at a time, with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms 4 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 MECHANICAL DATA MCFP002A - JANUARY 1995 - REVISED FEBRUARY 2002 W (R-GDFP-F14) CERAMIC DUAL FLATPACK Base and Seating Plane 0.045 (1,14) 0.026 (0,66) 0.260 (6,60) 0.235 (5,97) 0.080 (2,03) 0.045 (1,14) 0.008 (0,20) 0.004 (0,10) 0.280 (7,11) MAX 1 14 0.019 (0,48) 0.015 (0,38) 0.050 (1,27) 0.390 (9,91) 0.335 (8,51) 0.005 (0,13) MIN 4 Places 7 0.360 (9,14) 0.250 (6,35) 8 0.360 (9,14) 0.250 (6,35) 4040180-2 / C 02/02 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a ceramic lid using glass frit. Index point is provided on cap for terminal identification only. Falls within MIL STD 1835 GDFP1-F14 and JEDEC MO-092AB POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 MECHANICAL DATA MLCC006B - OCTOBER 1996 FK (S-CQCC-N**) 28 TERMINAL SHOWN LEADLESS CERAMIC CHIP CARRIER 18 17 16 15 14 13 12 NO. OF TERMINALS ** 11 10 28 9 8 7 6 68 5 84 44 52 20 A MIN 0.342 (8,69) 0.442 (11,23) 0.640 (16,26) 0.739 (18,78) 0.938 (23,83) 1.141 (28,99) MAX 0.358 (9,09) 0.458 (11,63) 0.660 (16,76) 0.761 (19,32) 0.962 (24,43) 1.165 (29,59) MIN 0.307 (7,80) 0.406 (10,31) 0.495 (12,58) 0.495 (12,58) 0.850 (21,6) 1.047 (26,6) B MAX 0.358 (9,09) 0.458 (11,63) 0.560 (14,22) 0.560 (14,22) 0.858 (21,8) 1.063 (27,0) 19 20 21 B SQ 22 A SQ 23 24 25 26 27 28 1 2 3 4 0.080 (2,03) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25) 0.020 (0,51) 0.010 (0,25) 0.055 (1,40) 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) 0.045 (1,14) 0.035 (0,89) 4040140 / D 10/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a metal lid. The terminals are gold plated. Falls within JEDEC MS-004 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 MECHANICAL MPDI002C - JANUARY 1995 - REVISED DECEMBER 20002 N (R-PDIP-T**) 16 PINS SHOWN PLASTIC DUAL-IN-LINE PACKAGE PINS ** DIM A 16 9 A MAX 14 0.775 (19,69) 0.745 (18,92) 16 0.775 (19,69) 0.745 (18,92) 18 0.920 (23,37) 0.850 (21,59) 20 1.060 (26,92) 0.940 (23,88) A MIN 0.260 (6,60) 0.240 (6,10) C MS-100 VARIATION AA BB AC AD 1 0.070 (1,78) 0.045 (1,14) D 8 0.045 (1,14) 0.030 (0,76) D 0.020 (0,51) MIN 0.325 (8,26) 0.300 (7,62) 0.015 (0,38) 0.200 (5,08) MAX Seating Plane 0.125 (3,18) MIN 0.010 (0,25) NOM Gauge Plane 0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0.010 (0,25) M 0.430 (10,92) MAX 14/18 PIN ONLY 20 pin vendor option D 4040049/E 12/2002 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001, except 18 and 20 pin minimum body lrngth (Dim A). D. The 20 pin end lead shoulder width is a vendor option, either half or full width. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 MECHANICAL DATA MSOI002B - JANUARY 1995 - REVISED SEPTEMBER 2001 D (R-PDSO-G**) 8 PINS SHOWN 0.050 (1,27) 8 5 0.020 (0,51) 0.014 (0,35) 0.010 (0,25) PLASTIC SMALL-OUTLINE PACKAGE 0.244 (6,20) 0.228 (5,80) 0.157 (4,00) 0.150 (3,81) 0.008 (0,20) NOM Gage Plane 1 A 4 0- 8 0.044 (1,12) 0.016 (0,40) 0.010 (0,25) Seating Plane 0.069 (1,75) MAX 0.010 (0,25) 0.004 (0,10) 0.004 (0,10) PINS ** DIM A MAX A MIN 8 0.197 (5,00) 0.189 (4,80) 14 0.344 (8,75) 0.337 (8,55) 16 0.394 (10,00) 0.386 (9,80) 4040047/E 09/01 NOTES: A. B. C. D. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15). Falls within JEDEC MS-012 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. 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